CONCUR 2004 START ConferenceManager    

On Flatness for 2-dimensional Vector Addition Systems with States

Jérôme Leroux and Grégoire Sutre

Presented at Fifteenth International Conference on Concurrency Theory (CONCUR 2004), London, England, 31 August - 3 September, 2004


Vector addition systems with states (VASS) are counter automata where (1) counters hold nonnegative integer values, and (2) the allowed operations on counters are increment and decrement.

Accelerated symbolic model checkers, like FAST, LASH or TReX, provide generic semi-algorithms to compute reachability sets for VASS (and for other models), but without any termination guarantee.

Hopcroft and Pansiot proved that for 2-dim VASS (i.e. VASS with two counters), the reachability set is effectively semilinear. However, they use an ad-hoc algorithm that is specifically designed to analyze 2-dim VASS.

In this paper, we show that 2-dim VASS are flat (i.e. they ``intrinsically'' contain no nested loops). We obtain that --- forward, backward and binary --- reachability sets are effectively semilinear for the class of 2-dim VASS, and that these sets can be computed using generic acceleration techniques.

START Conference Manager (V2.47.4)