11 March
Noon, LT308 Huxley
Title: | The ARM Architecture |
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Abstract: | The ARM processor architecture is a Reduced Instruction Set Computer (RISC) architecture. It provides support for the 32-bit ARM and 16-bit Thumb Instruction Set Architectures (ISAs) along with extensions to provide support for Java acceleration (Jazelle), security (TrustZone), SIMD and NEON technologies. High performance, low power consumption, and small code size are the key characteristics of the ARM architecture. This talk will briefly introduce the ARM technologies and the development tools. |
Speaker Details: | Zheng Wang Zheng Wang is an applications engineer at ARM Ltd. He is currently working in the applications team of the Systems Design Division. He holds a PhD degree from the University of Manchester. His main research area is Component Based Software Engineering and Software Verification. He participated in the project CologNet (European Network of Excellence in Computational Logic) and co-organized workshops on predictable software component assembly. He delivered a KEG seminar to the Computer Science department of Aston University. |