Load Instructions

la Rdest, addressLoad Address ${}^{\dagger}$
Load computed address, not the contents of the location, into register Rdest.

lb Rdest, addressLoad Byte
lbu Rdest, addressLoad Unsigned Byte
Load the byte at address into register Rdest. The byte is sign-extended by the lb, but not the lbu, instruction.

ld Rdest, addressLoad Double-Word ${}^{\dagger}$
Load the 64-bit quantity at address into registers Rdest and Rdest + 1.

lh Rdest, addressLoad Halfword
lhu Rdest, addressLoad Unsigned Halfword
Load the 16-bit quantity (halfword) at address into register Rdest. The halfword is sign-extended by the lh, but not the lhu, instruction

lw Rdest, addressLoad Word
Load the 32-bit quantity (word) at address into register Rdest.

lwcz Rdest, addressLoad Word Coprocessor
Load the word at address into register Rdest of coprocessor $z$ (0-3).

lwl Rdest, addressLoad Word Left
lwr Rdest, addressLoad Word Right
Load the left (right) bytes from the word at the possibly-unaligned address into register Rdest.

ulh Rdest, addressUnaligned Load Halfword ${}^{\dagger}$
ulhu Rdest, addressUnaligned Load Halfword Unsigned ${}^{\dagger}$
Load the 16-bit quantity (halfword) at the possibly-unaligned address into register Rdest. The halfword is sign-extended by the ulh, but not the ulhu, instruction

ulw Rdest, addressUnaligned Load Word ${}^{\dagger}$
Load the 32-bit quantity (word) at the possibly-unaligned address into register Rdest.