Advanced Computer Architecture

Lecturer : Paul Kelly (homepage)
For course notes click on the lecturers homepages.

To develop a thorough understanding of high-performance computer architecture, as a basis for informed software performance engineering and as a foundation for advanced work in computer architecture, compiler design, operating systems and parallel processing.

Performance: measuring and reporting computer systems performance; Amdahl's Law.

Pipelined CPU architecture. Instruction set design and pipeline structure. Dynamic scheduling using score boarding and Tomasulo's algorithm. Software instruction scheduling and software pipelining. Superscalar and long-instruction-word architectures. Branch prediction and speculative execution.

Caches: associativity, allocation and replacement policies, sub-block placement. Multilevel caches, multilevel inclusion. Cache performance issues.

Uniprocessor cache coherency issues: self-modifying code, peripherals, address translation.

Vectorising compilers and their capabilities; applications to parallelisation and memory hierarchy optimisation.

Interconnection networks: topology, routing, flow control, deadlock avoidance. The k-ary n-cube family of topologies.

Virtual channels, wormhole routing and virtual cut-through.

Implementations of shared memory: the cache coherency problem. Update vs invalidation. The bus-based 'snooping' protocol design space. Scalable shared memory using directory-based cache coherency. Alternative approaches.