JOURNAL PAPERS

· K. Atasu, L. Pozzi and P. Ienne. Automatic Application-Specific Instruction-Set Extensions under Microarchitectural Constraints. International Journal of Parallel Programming, 31(6): 411-428, December, 2003.

· L. Pozzi, K. Atasu and P. Ienne. Exact and approximate algorithms for the extension of embedded processor instruction sets. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(7):1209–29, July, 2006.

· K. Atasu, C. Özturan, G. Dündar, O. Mencer and W. Luk. CHIPS: Custom Hardware Instruction Processor Synthesis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(3):528–541, March, 2008.

· K. Atasu, W. Luk, O. Mencer, C. Özturan, and G. Dündar. FISH: Fast Instruction SyntHesis for Custom Processors . IEEE Transactions on Very Large Scale Integration Systems, to appear.

· J. Reddington and K.Atasu. Complexity of Computing Convex Subgraphs in Custom Instruction Synthesis. IEEE Transactions on Very Large Scale Integration Systems, to appear.

CONFERENCES AND WORKSHOPS

· K. Atasu, L. Pozzi and P. Ienne. Automatic Application-Specific Instruction-Set Extensions under Microarchitectural Constraints. Proceedings of the 40^th Design Automation Conference (DAC), Anaheim, CA, June, 2003 (Best Paper Award).

· P. Biswas, V. Choudhary, K. Atasu, L. Pozzi, N. Dutt and P. Ienne. Introduction of Local Memory Elements in Instruction Set Extensions. Proceedings of the 41^st Design Automation Conference (DAC), San Diego, CA, June, 2004.

· K. Atasu, M. Macchetti and L. Breveglieri. Efficient AES Implementations for ARM Based Platforms. Proceedings of the ACM Symposium on Applied Computing (SAC), Nicosia, Cyprus, March, 2004.

· K. Atasu, G. Dündar and C. Özturan. An Integer Linear Programming Approach for Identifying Instruction-Set Extensions. Proceedings of the International Conference on Hardware - Software Codesign and System Synthesis (CODES+ISSS), Jersey City, NJ, September, 2005.

· W. Luk, K. Atasu, R. Dimond, and O. Mencer. Towards Optimal Custom Instruction Processors. IEEE HOT Chips Conference, Stanford, CA, August 2006.

· K. Atasu, R. Dimond, O. Mencer, W. Luk, C. Özturan and G. Dündar. Optimizing Instruction-set Extensible Processors under Data Bandwidth Constraints. Proceedings of Design, Automation and Test in Europe Conference (DATE), Nice, France, April, 2007.

· K. Atasu, T. Todman, O. Mencer and W. Luk. Optimal Implementation of Combinational Logic on Lookup Tables. Proceedings of the 4^th IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME'08), Istanbul, Turkey, June, 2008.

· K. Atasu, O. Mencer, W. Luk, C. Özturan and G. Dündar. Fast Custom Instruction Identification by Convex Subgraph Enumeration. Proceedings of the 19^th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Leuven, Belgium, July, 2008 (Best Paper Award).

· J. van Lunteren, J. Rohrer, K. Atasu and C. Hagleitner. Regular Expression Acceleration at Multiple Tens of Gb/s. 1st Workshop on Accelerators for High-performance Architectures (WAHA), IBM T.J. Watson Research Center, Yorktown Heights, NY, USA, June 2009.

· J. Rohrer, K. Atasu, J. van Lunteren and C. Hagleitner. Memory-Efficient Distribution of Regular Expressions for Fast Deep Packet Inspection. Proceedings of the 7^th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis , November, 2009.

OTHER PUBLICATIONS AND REPORTS

· B. S. Project Report: A Communication Performance Benchmarking Tool for Beowulf Clusters. Boğaziçi University, Istanbul, Turkey, June, 2000. (Best B.S. Project Award)

· M.E. Project Report: Optimization of Advanced Encryption Standard for Intel StrongARM SA-1110 Microprocessor, University of Lugano, Switzerland, July, 2002.

· PhD. Thesis: Hardware/Software Partitioning for Custom Instruction Processors. Boğaziçi University, Istanbul, Turkey, November, 2007.