Papers

Ray C.C. Cheung, A. Brown, W. Luk, and and P.Y.K. Cheung, "A Scalable Hardware Architecture for Prime Number Validation", proceedings of the IEEE International Conference on Field Programmable Technology (FPT), Brisbane, Australia, 2004. IEEEXplore Abstract

A. Brown, P. Kelly, W. Luk, "Profile-directed speculative optimization of
reconfigurable floating point data paths", Workshop on Reconfigurable Computing at HiPEAC 2008. PDF
A. Brown, P. Kelly, W. Luk, "Profiling floating point value ranges for reconfigurable implementation", Workshop on Reconfigurable Computing at HiPEAC 2007. PDF
A. Brown, W. Luk, P. Kelly, "Generating Hardware Designs by Source Code Transformation", position paper for STS'06, Software Transformation Systems Workshop at GPCE06/OOPSLA06. PDF (Position Paper)
A. Brown, W. Luk, P. Kelly, "Optimising Transformations for Hardware Compilation", proceedings of ACACES 2005, the First International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems.
Ray C.C. Cheung and A. Brown, "A Scalable System-on-a-chip Architecture for Prime Number Validation", proceedings of IEE SoC Design, Test and Technology Postgraduate Seminar, Loughborough, United Kingdom, 2004.

A. Brown, "Optimising Transformations for Hardware Compilation", Master's Thesis, Department of Computing, Imperial College London, 2005. PDF