ChiWai Yu

Email: yuchiwai@gmail.com

Biography

ChiWaiYu received the B.Eng. degree in Computer Engineering and Computer Science & Engineering from The Chinese University of Hong Kong in 2003, and the PhD degree in computing from Imperial College London in 2010. In 2003, he worked as an engineer in  InterQoS System Ltd.. In 2004, he worked as Programmer in Sengital Ltd.. He was a police constable (Specialist) in Hong Kong Police Force from 2005 to 2006. Currently, he is a research fellow in the Electrical Engineering department at City University of Hong Kong. He is also working in the development of the latest VPR involving the Department of Electrical and Computer Engineering, University of Toronto. His research interests include architecture and  CAD tools  for reconfigurable computing, signal processing and biological computing.

Dr. Yu was a recipient of the Stamatis Vassiliadis Outstanding Paper Awards from the International Conference on Field Programmable Logic in 2007 as well as the Synplicity Best Ph.D. Student Paper Award from the Southern Programmable Logic Conference in 2008.

He is currently the finance chair of the 8^th IEEE International Symposium on Applied Reconfigurable Computing (ARC) Conference, Hong Kong, 2012.

　

JOURNAL PAPERS

·        C.W. Yu, Doris Z. Wang, Ray C.C. Cheung and Hong Yan, "A Low Power and Scalable Geometric Biclustering Accelerator for DNA Microarray Data Analysis", Submitted to IEEE Transactions on Industrial Electronics (TIE), 2012.

·         C.W. Yu, A. Smith, P.H.W. Leong, W. Luk, S.J.E. Wilton,, "Optimizing Floating Point Units in Hybrid FPGA", IEEE Transactions on Very-Large Scale Integration (VLSI) Systems, 2010, to appear.

·         C.H. Ho, C.W. Yu, P.H.W. Leong, W. Luk, S.J.E. Wilton, "Floating Point FPGA: Architecture and Modelling", IEEE Transactions on Very-Large Scale Integration (VLSI) Systems, 17(2):1709-1718, Dec. 2009. [pdf]

·         C.W. Yu, J. Lamoureux, S.J.E. Wilton, P.H.W. Leong, W. Luk, "The Coarse-Grained / Fine-Grained Logic Interface in FPGAs with Embedded Floating Point Units", International Journal of Reconfigurable Computing, vol. 2008, Article ID 736203, 2008. [pdf]

CONFERENCE PAPERS

·        J. Rose, J. Luu, C.W Yu, O. Densmore, J. Goeders, A. Somerville, K.B. Kent, P. Jamieson and J. Anderson, "The VTR Project: Architecture and CAD for FPGAs from Verilog to Routing", Proceedings of the 20th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), pp.77-86, 2012.  [pdf]

·        Will X.Y. Li , Rosa H.M. Chan, Wei Zhang, C.W. Yu, Ray C.C. Cheung, Dong Song, Theodore W. Berger, "FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Activities", Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), pp.44-49, 2011.  [pdf]

·        C.W. Yu, Doris Z. Wang, Ray C.C. Cheung and Hong Yan, "An FPGA-based Geometric Biclustering Accelerator for Genes Microarray Data Analysis ", Accepted in Design , Automation and Test in Europe (DATE) Workshop "W2 Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing", 2011.

·        C.W. Yu, W. Luk, S.J.E. Wilton, P.H.W. Leong, "Routing Optimization for Hybrid FPGAs ", Proceedings of the International Conference of Field-Programmable Technology (ICFPT), pp.419-422, 2009. [pdf]

·        C.W. Yu, A. Smith, P.H.W. Leong, W. Luk, S.J.E. Wilton, "Optimizing Coarse-Grained Units in Floating Point Hybrid FPGA", Proceedings of the International Conference of Field-Programmable Technology (ICFPT), pp.57-64, 2008. [pdf], [presentation slide]

·        C.W. Yu, J. Lamoureux, S.J.E. Wilton, P.H.W. Leong, W. Luk, "The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units", Proceedings of the Southern Programmable Logic Conference (SPL), pp.63-68, 2008. Synplicity Best Ph.D. Student Paper Award. [pdf], [presentation slide]

·        C.H. Ho, C.W. Yu, P.H.W. Leong, W. Luk, S.J.E. Wilton, "Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications", Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), pp.196-201, 2007. Stamatis Vassiliadis Award for Outstanding Paper. [pdf], [presentation slide]

·        C.W. Yu, K.H. Kwong, K.H. Lee and P.H.W. Leong, "A Smith-Waterman Systolic Cell", Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), included in Lecture Notes in Computer Science 2778, Springer-Verlag, pp.375-384, 2003. [pdf]

BOOK CHAPTER

·         C.W. Yu, K.H. Kwong, K.H. Lee and P.H.W. Leong, "A Smith-Waterman Systolic Cell", In New Algorithms, Architectures and Applications for Reconfigurable Computing, Patrick Lysaght and Wolfgang Rosenstiel (Eds.), pp. 291-300, Springer 2005, ISBN: 1-4020-3127-0.

PHD FORUM

·         C.W. Yu, "A Tool for Exploring Hybrid FPGAs", Proceedings of the International Conference on Field Programmable Logic and Applications (FPL) PhD forum, pp.509-510, 2007. [pdf], [poster]

PhD Thesis

·         Chi Wai, Yu, "Hybrid FPGA: Architecture and Interface". [pdf]

Teaching Experiences

·         Jun 2011: Mentor the course EE 6611 - Direct Study for Taught Postgraduate Student to teach the web development technique for an online e-learning platform project. (City University of Hong Kong

·         Aug 2010- Apr 2011: Mentor of Final Year Project Students, guiding them to solve problem for the projects and teaching them basic knowledge on reconfigurable device. (City University of Hong Kong)

·         Aug 2009 – May 2010: Assist a Final Year Project student to work on the modification of place and route tool for FPGA called VPR. (Imperial College London)

Invited Seminar

·         Chi Wai, Yu, "Hybrid FPGA: Architecture and Modeling"Seminar Series on Complex Systems, Networks, Control and Chaos (CCCN), City University of Hong Kong and The Polytechnic University, 24-Sept-2010. [presentation slide]