| Time | Monday | Tuesday | Wednesday | Thursday | Friday |
|---|---|---|---|---|---|
| 09:00 | Union Fair at the Great Hall, Dining Hall, Queen's Lawn and IC Union - all day (week 1-1) |
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| 10:00 | Digital Signal Processes LEC (1-1) / p.naylor (1-1) / EE408 |
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| 11:00 | Project meeting for final year students 11.30 to 13.00 d.brookes (1-1), g.constantinides (1-1), t.clarke (1-1) / EE408 Project meeting for final year students 11.30 to 13.00 d.brookes (1-1), g.constantinides (1-1), t.clarke (1-1) / EE408 |
Control Engineering LEC (1-3) / r.b.vinter (1-3) / EE509a_&_b |
Digital Signal Processes LEC (1-1) / p.naylor (1-1) / EE408 |
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| 12:00 | Project meeting for final year students 11.30 to 13.00 d.brookes (1-1), g.constantinides (1-1), t.clarke (1-1) / EE408 Project meeting for final year students 11.30 to 13.00 d.brookes (1-1), g.constantinides (1-1), t.clarke (1-1) / EE408 |
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| 13:00 | |||||
| 14:00 | Digital Signal Processes LEC (1-3) / p.naylor (1-3) / EE509a_&_b |
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| 15:00 | EE Adhoc g.constantinides (1-1), t.c.green (1-1) / EE509a_&_b |
Digital Signal Processes LEC (1-3) / p.naylor (1-3) / EE509a_&_b |
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| 16:00 | Control Engineering LEC (1-11) / r.b.vinter (1-11) / EE408 |
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| 17:00 |