Ian Page – Downloadable Subset of my Papers

 

This page has downloadable copies of a selection papers and other documents, mostly written or co-written by me.

Computing Without Computers and Hardware Compilation

  1. ASPIRE Project (Oxford/ARM/Atmel) : Advanced Silicon Prototyping in a Reconfigurable Environment, M. Aubury, I. Page, D. Plunkett, M. Sauer, and J. Saul. (12 pages, updated Sep97) ) Abstract
  2. Compiling Video Algorithms into Hardware, Ian Page. (10 pages, updated Jul97)
  3. Hardware Compilation, Configurable Platforms and ASICs for Self-validating Sensors, Ian Page. (11 pages, updated Jun97)
  4. Reconfigurable Processor Architectures, Ian Page. (16 pages, updated Oct95) Abstract
  5. The Design of a New FPGA Architecture, Anthony Stansfield and Ian Page. A description of the new CAM-based FPGA architecture. (14 pages, written Jul95) Abstract
  6. Constructing Hardware-Software Systems from a Single Description, Ian Page. A broad paper on our hardware compilation system submitted for an upcoming special issue of VLSI signal processing (Eds. Luk, Buell) (23 pages, updated Jul95). Abstract
  7. Reconfigurable Processors, Ian Page. An invited keynote address for the Heathrow PLD Conference, April 1995. (8 pages). Abstract
  8. Compiling Occam into Hardware, Ian Page and Wayne Luk. A paper on the basic occam to hardware compilation strategy, written with a computing/engineering audience in mind. (13 pages, written Oct91). Abstract
  9. Special Report on Automated Codesign, Ian Page. Prepared for New Electronics and published in shortened form, 13 Dec 1994. (6 pages, written Oct94). Abstract
  10. Parametrised Processors, Ian Page. Presented at the September'93 International Workshop on FPGAs at Oxford. (13 pages, written 27Aug93). Abstract
  11. Automatic Systems Synthesis, Ian Page. A case study of a `smart sensor' interface. Abstract
  12. Closing the Hardware/Software Gap, Prof. C.A.R. Hoare and Ian Page. Closing the hardware/software gap by algebraic transformations of programs. (20 pages, written 13Dec93). Abstract
  13. The HARP Reconfigurable Computing System, Ian Page. An outline description of the architecture and use of the HARP reconfigurable computing module (7 pages, written Oct94).
  14. Automatic Design and Implementation of Microprocessors, Ian Page. Presented at WoTUG 94. (15 pages, written Jan94). Abstract

 

Historical archive of DisArray/Disputer papers (New)

These are papers on my previous parallel hardware and array processor work. I can't help thinking that it ought to be related to the current FPGA work!

  1. DisArray : A Graphics-oriented Fifth Generation Workstation, Ian Page. A paper on the 16x16 Processor Array as a display processor for a powerful graphics workstation. (21 pages, written Dec '83). Abstract
  2. The Disputer : A Dual Paradigm Parallel Processor for Graphics and Vision, Ian Page. Published in ``Parallel Processing and Vision'', Ian Page (Ed.), Oxford University Press, 1988. Describes how the DisArray 16x16 SIMD graphics engine was upgraded into a dual-paradigm SIMD/MIMD machine. (13 pages, written 1988). Abstract