Example:

Suppose we have separate, non-pipelined FP Add, Multiply and Divide units. Consider:

ADDF	R3, R1, R2         
SUBF	R6, R4, R5		
MULF	R8, R6, R7
DIVF	R10, R3, R9

Timing:

 
Figure: Structural and data stalls with non-pipelined FPUs