Speculative execution: summary

• The tricky problem is to execute dependent chains of instructions speculatively
• This is vital in multiple-issue processors where effective branch delay would be huge even if correctly predicted
• Compiler techniques like trace scheduling and software pipelining exist, and can be assisted by various hardware techniques
• A dynamic technique builds neatly on Tomasulo's scheme
• Issue stage renames dest$^{\rm n}$ reg to ROB reg
• ROB copies ROB regs to true dest$^{\rm n}$ regs in proper exec$^{\rm n}$ order
• This simplifies processing of interrupts, exceptions and page faults
• 20% of HP8000's 3.8M transistors devoted to inst$^{\rm n}$ reorder buffer