Memory system

• L1 Instruction cache: 16 KB, 4-Way, 32 Byte/Line, LRU
• L1 Data cache: 16 KB, 4-way, 32 byte/line, non-blocking, dual-ported, write allocate, LRU
• L2 unified cache: 256 KB, 8-Way, 32 Byte/Line, non-blocking
• Note that the matrix occupies $512^2 \times 8 \approx$ 2MB.
• Each row of the matrix occupies $512 \times 8 \approx$ 4KB.