Chapter 7 - Parallel architectures, shared memory and cache coherency

Advanced Computer Architecture Chapter 7.27

Berkeley protocol - summary

Invalidate is usually better than update

Cache line state “DIRTY” bit records whether remote copies exist

If so, remote copies are invalidated by broadcasting message on bus – cache controllers snoop all traffic

Where to get the up-to-date data from?

Broadcast read miss request on the bus

If this CPUs copy is DIRTY, it responds

If no cache copies exist, main memory responds

If several copies exist, the CPU which holds it in “SHARED-DIRTY” state responds

If a SHARED-DIRTY cache line is displaced, … need a plan

How well does it work?

See extensive analysis in Hennessy and Patterson