Advanced Computer Architecture Chapter 7.39
State Transition Diagram for
an Individual Cache Block in a Directory Based System
States identical to
snoopy case; transactions very similar.
Transitions caused by read misses, write misses, invalidates, data fetch requests
Generates read miss & write miss msg to home directory.
Write misses that were
broadcast on the bus for snooping => explicit
invalidate & data fetch requests.
Note: on a write, a cache block is bigger, so need to read the full cache block