Advanced Computer Architecture Chapter 7.54
Uninterruptable Instruction to Fetch and Update Memory
Hard to have read & write in 1 instruction: use 2 instead
Load linked (or load locked) + store conditional
Load linked returns the initial value
Store conditional returns 1 if it succeeds (no other store to same memory location since preceeding load) and 0 otherwise
Example doing atomic swap with LL & SC:
• try: mov R3,R4   ; mov exchange value
 ll R2,0(R1) ; load linked
 sc R3,0(R1) ; store conditional
 beqz R3,try  ; branch store fails (R3 = 0)
 mov R4,R2  ; put load value in R4
Example doing fetch & increment with LL & SC:
• try: ll R2,0(R1) ; load linked
 addi R2,R2,#1 ; increment (OK if reg–reg)
 sc R2,0(R1) ; store conditional
beqz R2,try  ; branch store fails (R2 = 0)