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Cunning Idea: do (almost) all the above at
the same time
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Eg IBM SP/Power4: 2 CPUs/chip sharing L2,
multichip module
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packages/links
4 chips/node, with L3 and DRAM for each CPU on
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same
board, with high-speed (ccNUMA) link to other nodes (see
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http://www.rs6000.ibm.com/resource/features/1999/power4.html)
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