Journal:
[1]. Q. Liu, Tim Todman, Wayne Luk and G. A. Constantinides. "Automated Mapping of the MapReduce Pattern Onto Parallel Computing Platforms". In Journal of Signal Processing Systems, December, 2010.
[2]. Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung. "Combining data reuse exploitation with data-level parallelization for FPGA targeted hardware compilation: a geometric programming framework". In IEEE Transaction on Computer-Aided Design, pp. 179-184, volume 28, number 3, pp. 305-315, March, 2009.
[3]. Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung. "Data reuse exploration under an on-chip memory constraint for low power FPGA-based systems". In IET Computers and Digital Techniques, October, 2008.
[4]. Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung. "Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation". In Computing Journal, volume 52, issue 2, pp. 1-10, March, 2009.

Conference:
[1]. Q. Liu, T. Mak, J. Luo, W. Luk and A. Yakovlev. "Power Adaptive Computing System Design in Energy Harvesting Environment". In International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, Samos, Greece, July, 2011
[2]. Q. Liu, T. Todman, K. H. Tsoi and W. Luk. "Convex Moels for Accelerating Applications on FPGA-Based Clusters". In International Conference on Field Programmable Technology, Beijing, Dec., 2010
[3]. Tim Todman, Q. Liu, Wayne Luk and G. A. Constantinides. " Customizable Composition and Parameterization of Hardware Design Transformations". In 13th Euromicro conference on Digital System Design, Lille, France, September, 2010.
[4]. Tim Todman, Q. Liu, Wayne Luk and G. A. Constantinides. "A scripting engine for combining design transformations". In IEEE Symposium on Field-Programmable Custom Computing Machines, Charlotte North Carolina, US, May, 2010.
[5]. Q. Liu, Tim Todman, and Wayne Luk. "Combining Optimizations in Automated Low Power Design". In International Conference on Design, Automation & Test in Europe, Dresden, Germany, March, 2010.
[6]. Q. Liu, Tim Todman, Wayne Luk and G. A. Constantinides. "Automatic Optimisation of Map-Reduce Designs by Geometric Programming". In International Conference on Field Programmable Technology, Sydney, Australia, December, 2009.
[7]. Q. Liu, Tim Todman, Jose Gabriel de F. Coutinho, Wayne Luk and G. A. Constantinides. "Optimising Designs by Combining Model-Based and Pattern-Based Transformations". In International Conference on Field Programmable Logic and Applications, pp. Prague, Czech, September, 2009.
[8]. Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung. "Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation". In 1st International Conference on Visions of Computer Science, London, UK, September, 2008.
[9]. Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung. "Combining Data Reuse Exploitation with Data-Level Parallelization for FPGA Targeted Hardware Compilation: A Geometric Programming Framework". In 18th IEEE International Conference on Field Programmable Logic and Applications, pp. 179-184, Heidelberg, Germany, September, 2008.
[10]. Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung. "Data Reuse Exploration under Area Constraints for Low Power Reconfigurable Systems". In Workshop on Application Specific Processors, Salzburg, Austria, October, 2007.
[11]. Q. Liu, G. A. Constantinides, K. Masselos and P. Y. K. Cheung. "Automatic On-Chip Memory Minimization for Data Reuse". In Proc. 15th IEEE Symposium on Field-Programmable Custom Computing Machines, pp.251-260, Napa, CA, April, 2007.
[12]. Q. Liu, K. Masselos and G. A. Constantinides. "Data reuse exploration for FPGA based platforms applied to the full search motion estimation algorithm". In Proc. 16th IEEE International Conference on Field Programmable Logic and Applications, Madrid, Spain, August, 2006.