Tobias Becker

Welcome to my home page. I'm a postdoctoral researcher in the Custom Computing Group in the Department of Computing at Imperial College London.

Research

My research interests lie in Field-Programmable Gate Arrays (FPGAs) with special focus on design methods, tools and applications involving run-time reconfiguration. I'm currently working on the EPiCS project which focuses on self-aware compute systems. I'm also involved in the FASTER project which targets a new design approach for reconfigurable technology.

Publications

• S. Denholm, H. Inoue, T. Takenaka, T. Becker and W. Luk. "Low Latency FPGA Acceleration of Market Data Feed Arbitration", International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2014. (to appear)

• M. Kurek, T. Becker, T. C.P. Chau and W. Luk. "Automating Optimization of Reconfigurable Designs", International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2014.

• D. N. Pnevmatikatos, T. Becker, A. Brokalakis, G. Gaydadjiev, W. Luk, K. Papadimitriou, I. Papaefstathiou, O. Pell, C. Pilato, D. Pau, M. D. Santambrogio, D. Sciuto and D. Stroobandt. "Effective Reconfigurable Design: the FASTER Approach", International Symposium on Applied Reconfigurable Computing (ARC), 2014.

• Riccardo Cattaneo, Xinyu Niu, Christian Pilato, Tobias Becker, Wayne Luk, Marco D. Santambrogio. "A framework for effective exploitation of partial reconfiguration in dataflow computing", Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013 .

• M. Kurek, T. Becker and W. Luk. "Parametric Optimization of Reconfigurable Designs using Machine Learning", International Symposium on Applied Reconfigurable Computing (ARC), 2013.

• T. Becker, A. Agne, P. Lewis, R. Bahsoon, F. Faniyi, L. Esterle, A. Keller, A. Chandra, A. Jensenius, S. Stilkerich. "EPiCS: Engineering Proprioception in Computing Systems", International Conference on Computational Science and Engineering (CSE), 2012.

• K. Papadimitriou, C. Pilato, D. N. Pnevmatikatos, M. D. Santambrogio, C. Bogdan Ciobanu, T. Todman, T. Becker, T. Davidson, X. Niu, G. Gaydadjiev, W. Luk and D. Stroobandt. "Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration", International Conference on Computational Science and Engineering (CSE), 2012.

• T. Pitkänen, P. Jamieson, T. Becker, S. Moisio, J. Takala. "Power Consumption Benchmarking for Reconfigurable Platforms", Analog Integrated Circuits and Signal Processing, vol 73, issue 2, Nov. 2012.

• Q. Jin, T. Becker, W. Luk and D. Thomas. "Optimising Explicit Finite Difference Option Pricing For Dynamic Constant Reconfiguration", International Conference on Field Programmable Logic and Applications (FPL), 2012.

• D. N. Pnevmatikatos, T. Becker, A. Brokalakis, K. Bruneel, G. Gaydadjiev, W. Luk, K. Papadimitriou, I. Papaefstathiou, O. Pell, C. Pilato, M. Robart, M. D. Santambrogio, D.Sciuto, D. Stroobandt and T. Todman. "FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration", Euromicro Conference on Digital System Design (DSD), 2012.

• K. H. Tsoi, T. Becker and W. Luk. "Modelling Reconfigurable Systems in Event Driven Simulation ", ACM SIGARCH Computer Architecture News, vol. 40, no.5, pp. 34-39, December 2012.

• M. D. Santambrogio, D. N. Pnevmatikatos, K. Papadimitriou, C. Pilato, G. Gaydadjiev, D. Stroobandt, T. Davidson, T. Becker, T. Todman, W. Luk, A. Bonetto, A. Cazzaniga, G. Durelli and D. Sciuto. "Smart technologies for effective reconfiguration: The FASTER approach", Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012.

• T. Becker, Q. Jin, W. Luk and S. Weston. "Dynamic Constant Reconfiguration for Explicit Finite Difference Option Pricing", International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011.

• T. Becker, Q. Liu, W. Luk, G. Nebehay and R. Pflugfelder. "Hardware-accelerated object tracking", Computer Vision on Low-Power Reconfigurable Architectures Workshop, Field Programmable Logic and Applications, 2011.

• M. Bogdanski, P. R. Lewis, T. Becker and X. Yao. "Improving scheduling techniques in heterogeneous systems with dynamic, on-line optimisations", Complex, Intelligent, and Software Intensive Systems (CISIS), 2011.

• T. Becker, M. Koester and W. Luk, "Automated placement of reconfigurable regions for relocatable modules", IEEE International Symposium on Circuits and Systems, 2010

• T. Becker, W. Luk and P.Y.K. Cheung, "Energy-aware optimisation for run-time reconfiguration", Proc. IEEE Symposium on Field Programmable Custom Computing Machines, 2010

• P. Jamieson, T. Becker, P.Y.K. Cheung, W. Luk, T. Rissa and T. Pitkänen, "Benchmarking and evaluating reconfigurable architectures targeting the mobile domain", ACM Transactions on Design Automation of Electronic Systems, vol 15, issue 2, 2010

• T. Becker, P. Jamieson, W. Luk, P.Y.K. Cheung and T. Rissa, "Power Characterisation for Fine-Grain Reconfigurable Fabrics", International Journal of Reconfigurable Computing, vol. 2010, Article ID 787405, 9 pages, 2010

• P. Jamieson, T. Becker, W. Luk, P.Y.K. Cheung, T. Rissa and T. Pitkänen, "Benchmarking Reconfigurable Architectures in the Mobile Domain", IEEE Symposium on Field-Programmable Custom Computing Machines, 2009

• T. Becker, P. Jamieson, W. Luk, P.Y.K. Cheung and T. Rissa, "Power characterisation for the fabric in fine-grain reconfiguralbe architectures", Southern Conference on Programmable Logic, IEEE, 2009

• T. Becker, W. Luk and P.Y.K. Cheung, "Parametric Design for Reconfigurable Software-Defined Radio", Proceedings of the 5th international workshop on Reconfigurable Computing, Springer, 2009

• T. Becker, P. Jamieson, W. Luk, P.Y.K. Cheung and T. Rissa, "Towards benchmarking energy efficiency of reconfigurable architectures", International Conference on Field Programmable Logic and Applications, IEEE, 2008

• T. Becker, W. Luk and P.Y.K. Cheung, "Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration", Proc. IEEE Symposium on Field Programmable Custom Computing Machines, 2007

• A. Derbyshire, T. Becker and W. Luk, "Incremental Elaboration for Run-Time Reconfigurable Hardware Designs", CASES '06: Proceedings of the 2006 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, pp. 93-102, ACM Press, 2006

• P. Sedcole, B. Blodget, T. Becker, J. Anderson and P. Lysaght, "Modular Dynamic Reconfiguration in Virtex FPGAs", IEE Proceedings Computers & Digital Techniques, vol. 153, no. 3, pp. 157-164, May 2006

• P. Sedcole, B. Blodget, J. Anderson, P. Lysaght and T. Becker, "Modular Partial Reconfiguration in Virtex FPGAs", Proc. International Conference on Field-Programmable Logic and Applications, pp. 211-216, August 2005
• M. Huebner, T. Becker, J. Becker, "Real-Time LUT-Based Network Topologies for Dynamic and Partial FPGA Self-Reconfiguration", SBCCI '04: Proceedings of the 17th Symposium on Integrated Circuits and System Design, pp. 28-32, ACM Press, 2004

Contact details

Tobias Becker
Department of Computing
Imperial College London
South Kensington Campus
London SW7 2AZ, United Kingdom

Phone: +44 (0) 20 7594 8185
Email: tobias.becker04 imperial.ac.uk