### Oskar Mencer

Senior Lecturer, EPSRC Advanced Fellow (2005-2010)
Computer Architecture Research Group
Department of Computing, Imperial College London,
180 Queen's Gate, London SW7 2BZ, England.

Office: William Penney Laboratory (Bld 17, map) , Ground Floor
Phone: +44 207 594 8268 (x48268)
Fax: +44 207 581 8024
Email: o.mencer _at_ imperial ac uk

Consulting Professor, Center for Computational Earth and Environmental Science, Stanford University.

Recent Award: Special Golden Arrow presented by Lech Walesa and Hans-Dietrich Genscher at Com.Sult 2012

Keynotes:
"Dataflow Supercomputing", ICFPT Conference, December 2012.
"Maximum Performance Computing for Exascale Applications", SAMOS Conference, July 2012.
"A Perspective on the Limits of Computation", The Royal Institution, May 2012.
"Computing with FPGAs", IEEE COOL Chips IX, April 2006.

Award Papers:

Haohuan Fu, Oskar Mencer, Wayne Luk, "Optimizing Residue Arithmetic on FPGAs"
Best Paper Award, International Conference on Field-Programmable Technology 2008 (ICFPT'08). December, 2008.

Kubilay Atasu, Oskar Mencer, Wayne Luk, Wayne Luk, Can Ozturan,"Fast Custom Instruction Identification by Convex Subgraph Enumeration",
Best Paper Award, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Leuven, Belgium. July, 2008.

TEACHING: Computer Architecture (I, II), Custom Computing, Hardware, Multimedia, Computer Graphics

RESEARCH:

Theory and practice, interaction of hardware and software systems. More specifically this includes domain specific representations of computation on the system level, the architecture level, and the bit-level, including programming methodologies that exploit spatial and temporal parallelism on all three levels with the objective of increasing computational speed while decreasing power consumption. My research interests include computer architecture from embedded processors to supercomputers, parallel programming and parallel architectures, computer arithmetic, custom computing, VLSI, CAD, compilers, dynamic optimization, algorithms and programming methodologies.

- Publications

- EPSRC Funded Projects

- Recent Talk: Stanford Computer Systems Colloquium, April 28th, 2004

- PhD Thesis: "Rational Arithmetic Units in Computer Systems"

I am/have been serving on committees of the following international conferences: IEEE FCCM, IEEE COOL Chips, FPL, FPT, IEEE ASAP, ICS, ICCES, and DATE.

In the past I have also been employed at the Computer Architecture and Arithmetic Group at Stanford University, the Computing Sciences Center at Bell Labs, the Central Research Laboratory of Hitachi, Tokyo, and the DIGITAL Systems Research Center (->Compaq->HP) in Palo Alto. Introduction to Custom Computing (slides)

Suggestions for writing technical papers