•Suppose the cache line loaded
by this instruction turns out never to be reused
•If this happens a lot, we could
decide not to allocate data into the cache - so
cache space is not used unnecessarily
•Often combined with hardware
prefetching
•Eg in IBM Power3:
–hardware prefetch engine
identifies fixed-stride access stream, initiates
prefetching
–prefetched data is allocated
directly into L1 cache but bypasses L2 cache
•(similar ideas in Pentium 4,
Itanium etc).
•