•How should
the CPUs be connected?
•Idea: systems linked by network connected via I/O bus
–Eg Fujitsu
AP3000, Myrinet, Quadrics
•Idea: CPU/memory
packages linked by network connecting main memory units
–Eg SGI
Origin
•Idea: CPUs share main memory
–Eg Intel Xeon
SMP
•Idea: CPUs share L2/L3 cache
–Eg IBM
Power4
•Idea: CPUs share L1 cache
•Idea: CPUs share registers, functional units
–Cray/Tera MTA
(multithreaded architecture)