|
|
|
| Main memory |
||
| x |
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| Interconnection
network |
| CPU |
| Processor 1 |
| Processor 2 |
| Processor 0 |
|
|
|
|
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| • | Suppose
processor 0 stores to memory location x |
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| • | Processor
0’s cached copy of x is
updated |
|||
| • | Processor
1 continues to used the old value of x |
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