Composition of CPU

• Control Unit

  • Generates control/timing signals
  • Controls decoding/execution of instructions

• Arithmetic and Logic Unit (ALU )

  • Used during execution of instructions

  • Mathematical operations: * / + - etc.
  • Logical operations: and, or, etc. also shift, rotate

• Registers

  • Program Counter

    Holds address of instruction to be executed next

  • Instruction Register

    Holds instruction while it's decoded/executed

  • Stack Pointer

    Address of top of stack

  • Accumulator

    Result of ALU operations

  • General-Purpose Registers

    Hold intermediary results or addresses during execution of instructions

Simple CPU

Even Simpler Animated CPU

Animation of Fetch Execute Cycle

• Stack

  • Last-In First Out (LIFO) data structure
  • Temporary data storage
  • Holds return address during subroutines
  • Stack Pointer indicates current top of stack
  • Usually grows "downwards" from high memory

• Status Flags

  • 1-bit flags - held in a register
  • Change according to results of previous instructions

    eg. carry, overflow, sign

Instruction Execution

• CPU performs Fetch/Decode/Execute cycle

  • Fetch instruction from main memory
  • Increment Program Counter
  • Decode instruction
  • Fetch operands from memory
  • Execute instruction
  • Write results to memory

• Fetch Time depends on

  • Access time of main memory
  • Activity on System Bus

• Decode/Execute Time depends on

  • Speed of System Clock (Cycles per second - MHz)
  • Type of instruction

Von Neumann Architecture

• CPU can only execute One Instruction at a Time
• Instruction operates on only one set of operands at a time
• This simple design of computer known as "von Neumann" architecture
• CPU Executes a single sequence of instructions which operate on a single stream of data
• Also known as "Single Instruction, Single Data stream" (SISD) machine
• Instructions and Data both stored in Main Memory (no distinction)

Microprocessor (µP): "CPU on a chip"

• 8-Bit µP (1970s)

  Zilog Z80 • Motorola 6800 • NS 6502

• 16-bit µP (early 1980s)

  Intel 8086/88, 80286 • Motorola 68000

• 32-bit µP (mid 1980s)

Motorola 68030/40 • Intel 80386

• ...1990s: 64-bit machines e.g. DEC Alpha
• Internal Architecture may be different from size of Data Bus

Intel 8088: internally 16-bit, 8-bit data bus

Intel 386sx: internally 32-bit, 16-bit data bus

Can build computer using cheaper external parts (eg. I/O interfaces)

Processor Differences

• Instruction Set: operations, number/order of operands, addressing modes
• Registers: size (number of bits), how many, dedicated/general-purpose
• Address bus: size ("width")
• Data bus: size
• Control bus: functions
• Big-Endian/Little-Endian
• Permissible clock speeds

from Chris Hand