Trace-Based Cache Analysis

• Many design choices, e.g. degree of associativity, cache size, block size, replacement policy, write policy

• Most represent cost/performance tradeoffs. Cache simulators are used by designers to study these tradeoffs, and how cache parameters interact

• The effect of varying cache size and associativity is shown, based on a trace of a multiprogramming workload on a VAX with 32-byte blocks and LRU replacement (cf H&P pp 392)

Diagrams/trace.eps

Compulsory:

the first access to a block requires it to be brought in from a higher level

Capacity:

occurs when a new block is brought into a full cache

Conflict:

occurs when more than one block maps to the same cache block: blocks must be discarded and later retrieved

(cf H&P pp.392)