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- The AND instruction would stall unless the result of the ADD is forwarded --
but after one cycle delay
- The XOR needs no forwarding because its ID is after
the ADD's WB has completed
- In the H&P DLX design, the OR requires no forwarding:
the ADD's WB completes in the first half of the cycle,
the OR's ID takes place in the second half.
Paul H J Kelly
Mon Nov 17 01:29:59 GMT 1997