
Tobias Becker
Welcome to my home page. I'm a postdoctoral researcher in the Custom Computing Group in the Department of Computing at Imperial College London.
Research
My research interests lie in Field-Programmable Gate Arrays (FPGAs) with special focus on design methods, tools and applications involving run-time reconfiguration. I'm currently working on the EPiCS project which focuses on self-aware compute systems. I'm also involved in the FASTER project which targets a new design approach for reconfigurable technology.Publications
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T. Becker, Q. Jin, W. Luk and S. Weston.
"Dynamic Constant Reconfiguration for Explicit Finite Difference Option Pricing",
International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011.
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T. Becker, Q. Liu, W. Luk, G. Nebehay and R. Pflugfelder.
"Hardware-accelerated object tracking", Computer Vision on Low-Power Reconfigurable Architectures
Workshop, Field Programmable Logic and Applications, 2011.
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M. Bogdanski, P. R. Lewis, T. Becker and X. Yao.
"Improving scheduling techniques in heterogeneous systems with dynamic, on-line optimisations",
Complex, Intelligent, and Software Intensive Systems (CISIS), 2011.
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T. Becker, M. Koester and W. Luk,
"Automated placement of reconfigurable regions for relocatable modules",
IEEE International Symposium on Circuits and Systems, 2010
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T. Becker, W. Luk and P.Y.K. Cheung,
"Energy-aware optimisation for run-time reconfiguration",
Proc. IEEE Symposium on Field Programmable Custom Computing Machines, 2010
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P. Jamieson, T. Becker, P.Y.K. Cheung, W. Luk, T. Rissa and T. Pitkänen,
"Benchmarking and evaluating reconfigurable architectures targeting the mobile domain",
ACM Transactions on Design Automation of Electronic Systems, vol 15, issue 2, 2010
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T. Becker, P. Jamieson, W. Luk, P.Y.K. Cheung and T. Rissa,
"Power Characterisation for Fine-Grain Reconfigurable Fabrics",
International Journal of Reconfigurable Computing, vol. 2010, Article ID 787405, 9 pages, 2010
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P. Jamieson, T. Becker, W. Luk, P.Y.K. Cheung, T. Rissa and T. Pitkänen,
"Benchmarking Reconfigurable Architectures in the Mobile Domain",
IEEE Symposium on Field-Programmable Custom Computing Machines, 2009
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T. Becker, P. Jamieson, W. Luk, P.Y.K. Cheung and T. Rissa,
"Power characterisation for the fabric in fine-grain reconfiguralbe architectures",
Southern Conference on Programmable Logic, IEEE, 2009
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T. Becker, W. Luk and P.Y.K. Cheung,
"Parametric Design for Reconfigurable Software-Defined Radio",
Proceedings of the 5th international workshop on Reconfigurable Computing,
Springer, 2009
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T. Becker, P. Jamieson, W. Luk, P.Y.K. Cheung and T. Rissa,
"Towards benchmarking energy efficiency of reconfigurable architectures",
International Conference on Field Programmable Logic and Applications, IEEE, 2008
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T. Becker, W. Luk and P.Y.K. Cheung,
"Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration",
Proc. IEEE Symposium on Field Programmable Custom Computing Machines, 2007
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A. Derbyshire, T. Becker and W. Luk,
"Incremental Elaboration for Run-Time Reconfigurable Hardware Designs",
CASES '06: Proceedings of the 2006 International Conference on Compilers, Architecture and Synthesis for Embedded Systems,
pp. 93-102, ACM Press, 2006
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P. Sedcole, B. Blodget, T. Becker, J. Anderson and P. Lysaght,
"Modular Dynamic Reconfiguration in Virtex FPGAs",
IEE Proceedings Computers & Digital Techniques, vol. 153, no. 3, pp. 157-164, May 2006
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P. Sedcole, B. Blodget, J. Anderson, P. Lysaght and T. Becker,
"Modular Partial Reconfiguration in Virtex FPGAs",
Proc. International Conference on Field-Programmable Logic and Applications, pp. 211-216, August 2005
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M. Huebner, T. Becker, J. Becker,
"Real-Time LUT-Based Network Topologies for Dynamic and Partial FPGA Self-Reconfiguration",
SBCCI '04: Proceedings of the 17th Symposium on Integrated Circuits and System Design, pp. 28-32, ACM Press, 2004
Contact details
Tobias Becker
Department of Computing
Imperial College London
South Kensington Campus
London SW7 2AZ, United Kingdom
Phone: +44 (0) 20 7594 8185
Email: tobias.becker04
imperial.ac.uk

