Dong-U Lee, Altaf Abdul Gaffar, Ray C.C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides
Accuracy Guaranteed Bit-Width Optimization
IEEE Transactions on CAD, 2006.
[abstract,
ps,
pdf]
Oskar Mencer
ASC, A Stream Compiler for Computing with FPGAs
IEEE Transactions on CAD, 2006.
[abstract,
ps,
pdf]
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer and Wayne Luk.
Optimizing Hardware Function Evaluation
IEEE Transactions on Computers, Dec. 2005.
[abstract,
ps,
pdf]
Tim J. Todman, George A. Constantinides, Steve J.E. Wilton, Oskar Mencer, Wayne Luk and Peter Y.K. Cheung,
Reconfigurable Computing: Architectures and Design Methods,
Bookchapter: Bashir M. Al-Hashimi, ed., System-on-Chip: Next Generation Electronics, IEE Press, Jan. 2006.
Journal: IEE Proceedings on Computers and Digital Techniques 152 (2) pp.193-207 (2005).
[abstract]
Oskar Mencer, Wayne Luk,
Parameterized High Throughput Function Evaluation for FPGAs,
The Journal of VLSI Signal Processing, Special Issue on Reconfigurable Computing, Kluwer, March 2004.
[abstract]
Wayne Luk, Tom Kean, Arran Derbyshire, Jorn Gause, Steve McKeever, Oskar Mencer, Allen Yeow,
Parameterized Hardware Libraries for Configurable System-On-Chip Technology,
Can. J. Elect. & Comp. Eng., Vol 26, No. 3/4, July/Oct 2002.
[abstract]
Oskar Mencer, Marco Platzner, Martin Morf, Michael J. Flynn,
Object-oriented Domain-Specific Compilers
for Programming FPGAs,
IEEE Transactions on VLSI, special issue on Reconfigurable Computing,
Feb. 2001.
[abstract,
ps,
pdf]
Oskar Mencer, Luc Semeria, Martin Morf, Jean-Marc Delosme,
Application of Reconfigurable CORDIC Architectures,
The Journal of VLSI Signal Processing, special issue on Reconfigurable
Computing, Kluwer, March 2000.
[abstract,
ps,
pdf]
Oskar Mencer, Michael J. Flynn, Martin Morf,
Fast Transformation between Binary Numbers
and Simple Continued Fractions and its Applications to Rational Arithmetic,
(not published, available upon request)
[abstract]
W.H. Mangione-Smith, B. Hutchings, D. Andrews, A. DeHon,
C. Ebeling, R. Hartenstein, O. Mencer, J. Morris, K. Palem, V. Prasanna,
H. Spaanenburg,
Seeking Solutions in Configurable Computing,
IEEE Computer Magazine, Dec. 1997.
[abstract]
R.G.Dimond, O.Mencer and W.Luk
Automating Processor Customisation: Optimised Memory Access and Resource Sharing,
Design Automation and Test in Europe (DATE), March 2006.
[abstract,
ps,
pdf]
M. P. T. Juvonen, J. G. F. Coutinho, J. L. Wang, B. L. Lo, W. Luk, O. Mencer and G. Z. Yang
Custom Hardware Architectures for Posture Analysis,
IEEE International Conference on Field Programmable Technology (FPT), Singapore, Dec. 2005.
[abstract,
ps,
pdf]
Ray C.C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk and Peter Y.K. Cheung,
Automating Custom-Precision Function Evaluation for Embedded Processors,
International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES), San Francisco, Sept. 2005.
[abstract,
ps,
pdf]
Robert Dimond, Oskar Mencer and Wayne Luk,
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools,
International Conference on Field Programmable Logic (FPL), Tampere, Finland, August 2005.
[abstract,
ps,
pdf]
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer and Wayne Luk
MiniBit: Bit-width optimization via affine arithmetic,
Design Automation Conference (DAC) 2005.
[abstract,
ps,
pdf]
Jacob Bower, Oskar Mencer, Wayne Luk, Michael J. Flynn and Martin Morf
Dynamically Calibrating Clock Rate for FPGAs,
IEEE CoolChips Conference, Yokohama, April, 2005.
[abstract]
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer and Wayne Luk
Adaptive Range Reduction for Hardware Function Evaluation,
IEEE International Conference on Field Programmable Technology (FPT), Brisbane, Dec. 2004.
[abstract,
ps,
pdf]
Dong-U Lee, Oskar Mencer, David J. Pearce and Wayne Luk
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs,
International Conference on Field Programmable Logic (FPL), Antwerpen, Sept. 2004.
[abstract,
ps,
pdf]
Altaf A. Gaffar, Oskar Mencer, Wayne Luk, Peter Y.K. Cheung
Unifying Bit-width Optimisation for Fixed-point and Floating-point Designs,
IEEE International Conference on Field Programmable Custom Computing Machines (FCCM), Napa Valley, California, April 2004.
[abstract,
ps,
pdf]
Oskar Mencer, David J. Pearce, Lee W. Howes, Wayne Luk
Design Space Exploration with A Stream Compiler,
IEEE International Conference on Field Programmable Technology (FPT), Tokyo, Dec. 2003.
[abstract,
ps,
pdf]
Jian Liang, Russell Tessier, Oskar Mencer
Floating Point Unit Generation and Evaluation for FPGAs,
IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM), Napa, California, April 2003.
[abstract,
ps,
pdf]
Altaf A. Gaffar, Oskar Mencer, Wayne Luk, Peter Y.K. Cheung, Nabeel Shirazi
Floating Point Bitwidth Analysis via Automatic Differentiation,
Field Programmable Technology (FPT), Hong Kong, Dec. 2002,
[abstract,
ps,
pdf]
Oskar Mencer, Zhining Huang, Lorenz Huelsbergen
HAGAR: Multi-Context Hardware Graph Accelerators,
Field-Programmable Logic (FPL), Montpellier, France, Sept. 2002,
[abstract,
ps,
pdf]
Oskar Mencer
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs,
IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM), Napa, California, April 2002.
[abstract,
ps,
pdf]
Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles,
Parametrized Function Evaluation on FPGAs,
Field-Programmable Logic (FPL), Belfast, Ireland, September 2001.
[abstract,
ps,
pdf]
Oskar Mencer, Heiko Huebert, Martin Morf, Michael J. Flynn,
StReAm: Object-Oriented Programming
of Stream Architectures using PAM-Blox,
Plenary Session, Field-Programmable Logic (FPL), Villach, Austria,
September 2000.
[abstract,
ps,
pdf]
Patrick Hung, Hossam Fahmy, Oskar Mencer, Michael J. Flynn,
Fast Division Algorithm with a Small Lookup
Table,
Asilomar Conference on Signals, Systems, and Computers, California,
Nov. 1999.
[abstract,ps,
pdf]
Oskar Mencer, Martin Morf, Michael J. Flynn,
Precision of Semi-Exact Redundant Continued
Fraction Arithmetic for VLSI,
SPIE '99 (Arithmetic session), Denver, July 1999.
[abstract,
ps,
pdf]
Oskar Mencer, Marco Platzner,
Dynamic Circuit Generation for Boolean Satisfiability
in an Object-Oriented Design Environment,
Hawaii International Conference on System Sciences (ConfigWare Track),
Jan. 1999
[abstract,
ps,
pdf]
Oskar Mencer, Martin Morf, Michael J. Flynn,
Hardware Software Tri-Design of Encryption
for Mobile Communication Units,
IEEE International Conference on Acoustics, Speech and Signal Processing,
Seattle, May 1998.
[abstract,
ps,
pdf]
Oskar Mencer, Martin Morf, Michael J. Flynn,
PAM-Blox: High Performance FPGA Design for
Adaptive Computing,
IEEE Symposium on FPGAs for Custom Computing Machines, Napa Valley,
April 1998.
[abstract,
ps,
pdf]
Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai
Hardware Design with a Scripting Language,
Engineering of Reconfigurable Systems and Algorithms (ERSA), June 2003.
[abstract,ps,pdf]
Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai
PyHDL: Hardware Scripting with Python,
International Conference on Field Programmable Logic (FPL),Portugal, September 2003.
[abstract,ps,pdf]
Oskar
Mencer, Martin Morf, Michael J. Flynn,
Efficient Digit-Serial Rational Function Evaluation
and Digital Filtering Applications,
Asilomar Conference on Signals, Systems, and Computers, California,
Nov. 1999.
[abstract,ps,
pdf]
Oskar Mencer, Luc R. Semeria, Jean-Marc Delosme, Martin
Morf,
Application of Reconfigurable CORDIC Architectures,
Asilomar Conference on Signals, Systems, and Computers, California,
Nov. 1998.
[abstract,
ps,
pdf]
Oskar Mencer, Martin Morf, Michael
J. Flynn,
Pipelined CORDICs for Reconfigurable Computing,
The Sixth FPGA/PLD Design Conference & Exhibit, Yokohama, Japan,
June 1998.
[abstract,
ps,
pdf]
Oskar
Mencer, Martin Morf, Michael J. Flynn,