Publications

Conferences

  1. Lluís Vilanova, Nadav Amit, and Yoav Etsion, “Using SMT to accelerate nested virtualization.” In Intl. Symp. on Computer Architecture (ISCA), Jun 2019. [doi] [PDF]
  2. Casen Hunger, Lluís Vilanova, Charalampos Papamanthou, Yoav Etsion, and Mohit Tiwari, “DATS - Data Containers for Web Applications.” In Intl. Conf. on Arch. Support for Programming Languages & Operating Systems (ASPLOS), Mar 2018. [doi] [PDF]
  3. Lluís Vilanova, Marc Jordà, Nacho Navarro, Yoav Etsion, and Mateo Valero, “Direct Inter-Process Communication (dIPC): Repurposing the CODOMs Architecture to Accelerate IPC.” In European Conf. on Computer Systems (EuroSys), Apr 2017. [doi] [PDF]
  4. Javier Cabezas, Lluís Vilanova, Isaac Gelado, Thomas B. Jablin, Nacho Navarro, and Wen-mei W. Hwu, “Automatic Parallelization of Kernels in Shared-Memory Multi-GPU Nodes.” In Intl. Conf. on Supercomputing (ICS), Jun 2015. [doi] [PDF]
  5. Lluc Álvarez, Lluís Vilanova, Miquel Moretó, Marc Casas, Marc González, Xavier Martorell, Nacho Navarro, Eduard Ayguadé, and Mateo Valero, “Coherence Protocol for Transparent Management of Scratchpad Memories in Shared Memory Manycore Architectures.” In Intl. Symp. on Computer Architecture (ISCA), Jun 2015. [doi] [PDF]
  6. Lluís Vilanova, Muli Ben-Yehuda, Nacho Navarro, Yoav Etsion, and Mateo Valero, “CODOMs: Protecting Software with Code-centric Memory Domains.” In Intl. Symp. on Computer Architecture (ISCA), Jun 2014. [doi] [PDF]
  7. Marc Jordà, Ivan Tanasic, Javier Cabezas, Lluís Vilanova, Isaac Gelado, and Nacho Navarro, “Auto-Tunning of Data Communication on Heterogeneous Systems.” In Intl. Symp. on Embedded Multicore Socs (MCSoC), Sep 2013. [doi] [PDF]
  8. Lluc Alvarez, Lluís Vilanova, Marc Gonzàlez, Xavier Martorell, Nacho Navarro, and Eduard Ayguadé, “Hardware/Software Coherence Protocol for the Coexistence of Caches and Local Memories.” In Intl. Conf. for High Performance Computing, Networking, Storage and Analysis (SC), Nov 2012. [doi] [PDF]
  9. Carlos Villavieja, Vasileios Karakostas, Lluís Vilanova, Yoav Etsion, Alex Ramirez, Avi Mendelson, Nacho Navarro, Adrian Cristal, and Osman Unsal, “DiDi: Mitigating The Performance Impact of TLB Shootdowns Using A Shared TLB Directory.” In Intl. Conf. on Parallel Arch. and Compilation Techniques (PACT), Oct 2011. [doi] [PDF]
  10. Victor Jiménez, Lluís Vilanova, Isaac Gelado, Marisa Gil, Grigori Fursin, and Nacho Navarro, “Predictive Runtime Code Scheduling for Heterogeneous Architectures.” In Intl. Conf. on High Performance Embedded Architectures and Compilers (HiPEAC), Jan 2009. [doi] [PDF]

Journals

  1. Lluc Alvarez, Lluís Vilanova, Marc Gonzàlez, Xavier Martorell, Nacho Navarro, and Eduard Ayguadé, “Hardware-Software Coherence Protocol for the Coexistence of Caches and Local Memories.” IEEE Transaction on Computers, Jan 2015. [doi] [PDF]
  2. Nikola Rajovic, Nikola Puzovic, Lluís Vilanova, Carlos Villavieja, and Alex Ramirez, “The Low-Power Architecture Approach Towards Exascale Computing.” Journal of Computational Science, Nov 2013. [doi] [PDF]

Patents

  1. Yoav Etsion, Yonattan Gottesman, and Lluís Vilanova, “Logical-to-physical block mapping inside the disk controller: accessing data objects without operating system intervention.” US10331591B2 (granted Jun 25th 2019), Sep 2014.

Workshops

  1. Lluı́s Vilanova, Lina Maudlej, Matthias Hille, Nils Asmussen, Michael Roitsch, and Mark Silberstein, “Caladan: A Distributed Meta-OS for Data Center Disaggregation.” In Systems for Post-Moore Architectures (SPMA), Feb 2020. [PDF]
  2. Lluı́s Vilanova, Yoav Etsion, and Mark Silberstein, “One Interface to Rule them All: A Hardware/Software Co-Design for Disaggregated Computing.” In Systems for Multi-core and Heterogeneous Architectures (SFMA), Mar 2019. [PDF]
  3. Ivan Tanasic, Lluı́s Vilanova, Marc Jordà, Javier Cabezas, Isaac Gelado, Nacho Navarro, and Wen-mei Hwu, “Comparison based sorting for systems with multiple GPUs.” In Workshop on General Purpose Processor Using Graphics Processing Units (GPGPU), Nov 2013.
  4. Nikola Rajovic, Nikola Puzovic, Lluís Vilanova, Carlos Villavieja, and Alex Ramirez, “The low-power architecture approach towards exascale computing.” In Workshop on scalable algorithms for large-scale systems (ScalA), Nov 2011. [doi] [PDF]
  5. Isaac Gelado, Javier Cabezas, Lluís Vilanova, and Nacho Navarro, “The Cost of IPC: and Architectural Analysis.” In Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA), Jun 2007.
  6. Ramon Bertran, Marisa Gil, Javier Cabezas, Victor Jiménez, Lluís Vilanova, Enric Morancho, and Nacho Navarro, “Building a Global System View for Optimization Purposes.” In Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA), Jun 2006.

Posters

  1. Javier Cabezas, Lluís Vilanova, Isaac Gelado, Thomas B. Jablin, Nacho Navarro, and Wen-mei W. Hwu, “Automatic Execution of Single-GPU Computations across Multiple GPUs.” In Intl. Conf. on Parallel Arch. and Compilation Techniques (PACT), Aug 2014. [doi] [PDF]
  2. Lluís Vilanova, Javier Cabezas, Isaac Gelado, and Nacho Navarro, “A Flexible Multi-Grain Full-System Tracing Framework.” In Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-08), Poster Session, Jul 2008.
  3. Lluís Vilanova, and Nacho Navarro, “Support for Dynamically Adaptable Heterogeneous Applications.” In Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-07), Poster Session, Jul 2007.
  4. Ramon Bertran, Marisa Gil, Javier Cabezas, Victor Jiménez, Lluís Vilanova, Enric Morancho, and Nacho Navarro, “An Experimental Framework for Whole System Optimization.” In Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06), Poster Session, Jul 2006.
  5. Ramon Bertran, Marisa Gil, Javier Cabezas, Victor Jiménez, Lluís Vilanova, Enric Morancho, and Nacho Navarro, “Opportunities for Global Optimization: Breaking the Boundaries Across System Components.” In EuroSys 2006, Poster Session, Jan 2006.

Technical Reports

  1. Lluc Alvarez, Nikola Vujic, Lluís Vilanova, Ramon Bertran, Marc González, Xavier Martorell, Nacho Navarro, and Eduard Ayguadé, “Hardware/Software Coherence in Hybrid Memory Models.” Technical Report UPC-DAC-RR-CAP-2011-21, Jul 2011.